Question on Interrupts on MIPS

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Question on Interrupts on MIPS

Question 1):

Here 8259 External Interrupt Controller on Malta is at hardware interrupt no 2 and Malta is having a core with Vectored Interrupt mode enabled.

So, "malta_hw0_irqdispatch" handler will be copied to ebase + 200 + 2(vectorspacing) as we have used "        set_vi_handler(MIPSCPU_INT_I8259A, malta_hw0_irqdispatch)"

upon interrupt from 8259 CPU will jump to "ebase + 200 + 2(vectorspacing)" and service the interrupt.

But why we have that call to malta_hw0_irqdispatch() in plat_irq_dispatch which is supposed to be invoked upon general exception "except_vec3_generic"

asmlinkage void plat_irq_dispatch(void)
    unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
    int irq;

    if (unlikely(!pending)) {

    irq = irq_ffs(pending);

    if (irq == MIPSCPU_INT_I8259A)
    else if (gic_present && ((1 << irq) & ipi_map[smp_processor_id()]))
        do_IRQ(MIPS_CPU_IRQ_BASE + irq);

Question 2):

As per my understanding there are two ways a interrupt can be serviced

a) jump to "except_vec3_generic" which is at "ebase + 0x180"

except_vec3_generic --> handle_int (based on exception code)---> plat_irq_dispatch--->do_IRQ

b) jump to the handler

ebase + 200 + irq_no(VECTORSPACING) ---> do_IRQ as we saw in "malta_hw0_irqdispatch"

This is on a MIPS core with VINT mode enabled.

if there is a platform driver which request an irq, using request_irq, this will save its handler in the irq_desc array and upon the interrupt from the device it is serviced through process "a" as said above.

am I correct, or missing any thing here?

the process "b" of interrupt handling is possible only when we register the interrupt (should I call this as exception handling or I can say as interrupt handling) handler using set_vi_handler or set_handler

am I correct, or missing any thing here?